EE 5356/7356   VLSI Design and Lab

Fall 2004

 

 

Class Time & location: Tue/Thu 3:30pm – 4:50pm, 125 Cruth

 

Instructor: Dr. Ping Gui, 319 Junkins, x1733, pgui@engr.smu.edu

Office Hours: M & W 1:00pm-3:00pm, or by appointment via email.

 

Course Objective:

Ability to design and implement CMOS digital circuits and optimize them with respect to different constraints: size (cost), speed, power dissipation, and reliability

 

Textbook:

Digital Integrated Circuits, Second Edition by Jan Rabaey. The book is available in the SMU bookstore.

 

Grading Policy:

Midterm:      20%

Final:             20%

Homework:   20%

Project:         40%

 

Course Schedule (subject to change):

 

Wk	Topic	DIC Reading	HW
1	Introduction, design metrics	1	HW1
2	MOS transistors, CMOS inverters – the static view	3.1-3.3.2 & 5.1-5.3
3	Manufacturing process, Static CMOS logic	2.1-2.3 & 6.1-6.2.1	HW2
4	Pass transistor logic, MOS transistor C and R	6.2.3 & 3.3.3-3.3.5
5	The wire	4	HW3
6	CMOS inverter – the dynamic view	5.4-5.7
7	Catch-up, review and midterm examination	Midterm exam week	HW4
8	Dynamic CMOS logic, Timing metrics	6.3-6.5 & 7.1
9	Static and dynamic sequential circuits	7.2-7.3 & 7.5
10	Coping with interconnect	9	HW5
11	Timing issues, Datapaths	10.1-10.3.3 & 11.1-11.2
12	Adders, Multipliers, Shifters	11.3-11.9
13	Other arith. op’s, Memory classes and ROM cores	11.7-11.9 & 12.1-12.2.1
14	SRAM, DRAM, CAM cores, Memory peripheral circuitr7	12.2.2-12.5
15	Design for test, Tech. trends and scaling issues	H & 2.5, 3.5, 4.6, 5.6

 

 

Design Tools: 

Cadence tool set will be used for layout, extraction, and simulation. 

Composer:               schematic capture

LayoutPlus:              Layout & Extraction

Spectre:                   simulation

 

Disability Accommodations:

If you need academic accommodations for a disability, you must first contact Ms. Rebecca Marin, Coordinator, Services for Students with Disabilities (214-768-4563) to verify the disability and to establish eligibility for accommodations. Then you should schedule an appointment with the professor to make appropriate arrangements.

 

Honor Code:

You are subject to the Code of Professional Responsibility of the School of Engineering of Southern Methodist University. Important note: Any evidence of copied lab assignment, homework or dishonesty during tests will result in an academic dishonesty report in your record and the corresponding academic penalty. NO EXCEPTIONS.